• • • iEDA Homepage：ieda.oscc.cc/en/
  • iEDA Overview
  • iEDA Infrastructure and tool
  • iEDA Tapeout
  • Papers and Presentations
• iEDA User Guide
• • 1. Build iEDA from source code
  • • Method 1. Use the iEDA mirror (Redommended)
    • Method 2. Install dependencies and compile
  • 2. Design chip by using iEDA
  • • Method 1. Run release or demo mirror（Redommended)
    • Method 2. Compile iEDA binary and run
  • Contribution Guide
  • Discussion
  • License
  • Acknowledgement

iEDA

An open-source EDA infracstructure and tools from Netlist to GDS for ASIC design.

Chinese | English

Open-source is not a goal but a way

iEDA Homepage：ieda.oscc.cc/en/

iEDA Overview

• 1 EDA Infrastructure、11 EDA Tools、4 times tape-out design by iEDA
  • Level 1: Open-source EDA, RTL, PDK, supporting chip design；
  • Level 2: Open-source Infrastructure supports EDA development and research

iEDA Infrastructure and tool

• To fast develop high-quality EDA tool, we need a Software Development Kit (SDK)
• iEDA can be used to support developing EDA tool or algorithm
• Infrastructure: Database, Manager, Operator, Interface

iEDA Tapeout

🎉 News:

https://ieda.oscc.cc/en/publicity/news/

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Papers and Presentations

• iRT: Net Resource Allocation: A Desirable Initial Routing Step, DAC, 2024
• iCTS: Toward Controllable Hierarchical Clock Tree Synthesis with Skew-Latency-Load Tree, DAC, 2024
• AiEDA: An Open-source AI-native EDA Library, ISEDA, 2024
• iEDA: An Open-source infrastructure of EDA (invited), ASPDAC, 2024.
• iPD: An Open-source intelligent Physical Design Tool Chain (invited), ASPDAC, 2024.
• AiMap: Learning to Improve Technology Mapping for ASICs via Delay Prediction, ICCD, 2023
• iPL-3D: A Novel Bilevel Programming Model for Die-to-Die Placement, ICCAD, 2023.
• iEDA: An Open-source Intelligent Physical Implementation Toolkit and Library, ISEDA, 2023. (BPA) [paper, slides]

iEDA User Guide

Before designing chip by iEDA，you need to obtain the execution binary of iEDA.

If you need to modify iEDA through source code construction, please read in sequence.

You can also directly use the latest release docker， then you can skip "1. Source code construction of iEDA".

PS: you can refer Docker install and initilization to know how to install Docker.

1. Build iEDA from source code

We provide two methods for source code construction of iEDA as examples.

Method 1. Use the iEDA mirror (Redommended)

Download the latest “iedaopensource/base” mirror from Dockerhub, which includes the latest master branch code and dependencies (build tools and dependency libraries). You can also use the ‘-v’ command to mount your own downloaded iEDA code repository. The build will only use the compile tools and dependency libraries provided by the mirror.

The current directory after entering the container is the iEDA master branch code, refering the following commands:

# ieda opensource/base:(latest, ubuntu, debian)
docker run -it --rm iedaopensource/base:latest bash 
# enter docker and run build.sh to build
bash build.sh
# if output "Hello iEDA!", then compile successfully
./bin/iEDA -script scripts/hello.tcl

We have ubuntu（Ubuntu20.04）and debian（Debian11）mirror tag.

Method 2. Install dependencies and compile

installing command on Ubuntu 20.04:

# download iEDA repo
git clone --recursive https://gitee.com/oscc-project/iEDA.git iEDA && cd iEDA
# compile dependencies with an apt installation requires root permission
sudo bash build.sh -i apt
# comple iEDA
bash build.sh
# if output "Hello iEDA!", then compile successfully
./bin/iEDA -script scripts/hello.tcl

2. Design chip by using iEDA

Here, two iEDA operation methods are provided for reference

About how to use iEDA, please refer Tcl command manual and the tool instruction docs of readme.md in src/operation.

Method 1. Run release or demo mirror（Redommended)

If you need to use custom processes and designs, mount the associated files into the docker to run. About the structure and the corresponding config files, please refer the demo in scripts/sky130.

docker run -it -v ${file directory of pdk and design}:${file directory in docker} --rm iedaopensource/release:latest

Method 2. Compile iEDA binary and run

Refering the file directory in scripts/sky130，add the path of iEDA execution binary into the system path variable $PATH, and runing sh run_iEDA.sh，and seeing the result in result.

iEDA/scripts/sky130
├── iEDA_config   # iEDA parameters configuration files
├── lef           # lef files
├── lib           # lib files
├── result        # iEDA result output files
├── script        # Tcl script files
├── sdc           # sdc files
├── run_iEDA.py   # Python3 script for running iEDA
└── run_iEDA.sh   # POSIX shell script for running iEDA

Contribution Guide

Fork this iEDA repository，after adding and commiting code, please summit Pull Request。

Please note the using Coding Style of iEDA。

Discussion

• Create issue in repo
• QQ Group：793409748
• WeChat Group：

License

MulanPSL-2.0

Acknowledgement

In the development of iEDA, some sub-modules from the open-source community are employed. All relevant usage is listed below.

Sub-module	Source	Detail
flute3	FastRoute	Generate rectange steiner tree by flute3.
abseil-cpp	Google abseil	Use Google's high performance C++ container and algorithm library to improve performance compared to STL.
json	JSON for Modern C++	Json C++ library, used to parse the program Json configuration file.
magic_enum	Static reflection for enums (to string, from string, iteration)	Supports the conversion of enum values and character strings.
libfort	Seleznev Anton libfort	The C/C++ library produces formatted ASCII tables.
pegtl	PEGTL（Parsing Expression Grammar Template Library）	Use PEGTL to parse SPEF files easily.
pybind11	pybind 11	Easy for python to call C++.
VCDParser	ben-marshall verilog-vcd-parser	Parse power VCD waveform file.
def lef	def lef parser	Parse physical layout and design DEF/LEF files.
ThreadPool	Jakob Progsch, Václav Zeman threadpool	C++11 template library implementation of multithreaded pool.
fft	fft	Fast Fourier transform library.
hMETIS	hMETIS	Efficient graph partitioning algorithm.
lemon	lemon	Efficient modeling and optimization in graphs and networks.
SALT	SALT	Generating VLSI routing topology, It trades off between path length (shallowness) and wirelength (lightness).
scipoptsuite	SCIP	It is used to quickly solve mixed integer programming (MIP) and mixed integer nonlinear programming (MINLP).
parser/verilog	OpenROAD/OpenSTA/verilog	parse netlist file .
mt-kahypar	mt-kahypar	Multi-Threaded Karlsruhe Hypergraph Partitioner .

We are grateful for the support of the open-source community and encourage other open-source projects to reuse our code within the scope of the MulanPSL-2.0.