Use divideCeil

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

@@ -8391,36 +8391,6 @@ bool LoongArchTargetLowering::isEligibleForTailCallOptimization(
   return true;
 }
 
-SDValue LoongArchTargetLowering::addTokenForArgument(SDValue Chain,
-                                                     SelectionDAG &DAG,
-                                                     MachineFrameInfo &MFI,
-                                                     int ClobberedFI) const {
-  SmallVector<SDValue, 8> ArgChains;
-  int64_t FirstByte = MFI.getObjectOffset(ClobberedFI);
-  int64_t LastByte = FirstByte + MFI.getObjectSize(ClobberedFI) - 1;
-
-  // Include the original chain at the beginning of the list. When this is
-  // used by target LowerCall hooks, this helps legalize find the
-  // CALLSEQ_BEGIN node.
-  ArgChains.push_back(Chain);
-
-  // Add a chain value for each stack argument corresponding
-  for (SDNode *U : DAG.getEntryNode().getNode()->users())
-    if (LoadSDNode *L = dyn_cast<LoadSDNode>(U))
-      if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
-        if (FI->getIndex() < 0) {
-          int64_t InFirstByte = MFI.getObjectOffset(FI->getIndex());
-          int64_t InLastByte = InFirstByte;
-          InLastByte += MFI.getObjectSize(FI->getIndex()) - 1;
-
-          if ((InFirstByte <= FirstByte && FirstByte <= InLastByte) ||
-              (FirstByte <= InFirstByte && InFirstByte <= LastByte))
-            ArgChains.push_back(SDValue(L, 1));
-        }
-
-  // Build a tokenfactor for all the chains.
-  return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
-}
 static Align getPrefTypeAlign(EVT VT, SelectionDAG &DAG) {
   return DAG.getDataLayout().getPrefTypeAlign(
       VT.getTypeForEVT(*DAG.getContext()));
@@ -8505,6 +8475,13 @@ LoongArchTargetLowering::LowerCall(CallLoweringInfo &CLI,
   if (!IsTailCall)
     Chain = DAG.getCALLSEQ_START(Chain, NumBytes, 0, CLI.DL);
 
+  // During a tail call, stores to the argument area must happen after all of
+  // the function's incoming arguments have been loaded because they may alias.
+  // This is done by folding in a TokenFactor from LowerFormalArguments, but
+  // there's no point in doing so repeatedly so this tracks whether that's
+  // happened yet.
+  bool AfterFormalArgLoads = false;
+
   // Copy argument values to their designated locations.
   SmallVector<std::pair<Register, SDValue>> RegsToPass;
   SmallVector<SDValue> MemOpChains;
@@ -8620,14 +8597,14 @@ LoongArchTargetLowering::LowerCall(CallLoweringInfo &CLI,
         StackPtr = DAG.getCopyFromReg(Chain, DL, LoongArch::R3, PtrVT);
 
       if (IsTailCall) {
-        unsigned OpSize = (VA.getValVT().getSizeInBits() + 7) / 8;
+        unsigned OpSize = divideCeil(VA.getValVT().getSizeInBits(), 8);
         int FI = MF.getFrameInfo().CreateFixedObject(OpSize, Offset, true);
         DstAddr = DAG.getFrameIndex(FI, PtrVT);
         DstInfo = MachinePointerInfo::getFixedStack(MF, FI);
-        // Make sure any stack arguments overlapping with where we're storing
-        // are loaded before this eventual operation. Otherwise they'll be
-        // clobbered.
-        Chain = addTokenForArgument(Chain, DAG, MF.getFrameInfo(), FI);
+        if (!AfterFormalArgLoads) {
+          Chain = DAG.getStackArgumentTokenFactor(Chain);
+          AfterFormalArgLoads = true;
+        }
       } else {
         SDValue PtrOff = DAG.getIntPtrConstant(Offset, DL);
         DstAddr = DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr, PtrOff);

llvm/lib/Target/LoongArch/LoongArchISelLowering.h

@@ -263,12 +263,6 @@ private:
       CCState &CCInfo, CallLoweringInfo &CLI, MachineFunction &MF,
       const SmallVectorImpl<CCValAssign> &ArgLocs) const;
 
-  /// Finds the incoming stack arguments which overlap the given fixed stack
-  /// object and incorporates their load into the current chain. This prevents
-  /// an upcoming store from clobbering the stack argument before it's used.
-  SDValue addTokenForArgument(SDValue Chain, SelectionDAG &DAG,
-                              MachineFrameInfo &MFI, int ClobberedFI) const;
-
   bool softPromoteHalfType() const override { return true; }
 
   bool

llvm/test/CodeGen/LoongArch/musttail.ll

@@ -7,9 +7,9 @@ declare i32 @many_args_callee(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i3
 define i32 @many_args_tail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9) {
 ; LA32-LABEL: many_args_tail:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a0, $zero, 9
-; LA32-NEXT:    st.w $a0, $sp, 4
 ; LA32-NEXT:    ori $a0, $zero, 8
+; LA32-NEXT:    st.w $a0, $sp, 0
+; LA32-NEXT:    ori $a0, $zero, 9
 ; LA32-NEXT:    ori $a1, $zero, 1
 ; LA32-NEXT:    ori $a2, $zero, 2
 ; LA32-NEXT:    ori $a3, $zero, 3
@@ -17,15 +17,15 @@ define i32 @many_args_tail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %
 ; LA32-NEXT:    ori $a5, $zero, 5
 ; LA32-NEXT:    ori $a6, $zero, 6
 ; LA32-NEXT:    ori $a7, $zero, 7
-; LA32-NEXT:    st.w $a0, $sp, 0
+; LA32-NEXT:    st.w $a0, $sp, 4
 ; LA32-NEXT:    move $a0, $zero
 ; LA32-NEXT:    b many_args_callee
 ;
 ; LA64-LABEL: many_args_tail:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a0, $zero, 9
-; LA64-NEXT:    st.d $a0, $sp, 8
 ; LA64-NEXT:    ori $a0, $zero, 8
+; LA64-NEXT:    st.d $a0, $sp, 0
+; LA64-NEXT:    ori $a0, $zero, 9
 ; LA64-NEXT:    ori $a1, $zero, 1
 ; LA64-NEXT:    ori $a2, $zero, 2
 ; LA64-NEXT:    ori $a3, $zero, 3
@@ -33,7 +33,7 @@ define i32 @many_args_tail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %
 ; LA64-NEXT:    ori $a5, $zero, 5
 ; LA64-NEXT:    ori $a6, $zero, 6
 ; LA64-NEXT:    ori $a7, $zero, 7
-; LA64-NEXT:    st.d $a0, $sp, 0
+; LA64-NEXT:    st.d $a0, $sp, 8
 ; LA64-NEXT:    move $a0, $zero
 ; LA64-NEXT:    pcaddu18i $t8, %call36(many_args_callee)
 ; LA64-NEXT:    jr $t8
@@ -44,9 +44,9 @@ define i32 @many_args_tail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %
 define i32 @many_args_musttail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9) {
 ; LA32-LABEL: many_args_musttail:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a0, $zero, 9
-; LA32-NEXT:    st.w $a0, $sp, 4
 ; LA32-NEXT:    ori $a0, $zero, 8
+; LA32-NEXT:    st.w $a0, $sp, 0
+; LA32-NEXT:    ori $a0, $zero, 9
 ; LA32-NEXT:    ori $a1, $zero, 1
 ; LA32-NEXT:    ori $a2, $zero, 2
 ; LA32-NEXT:    ori $a3, $zero, 3
@@ -54,15 +54,15 @@ define i32 @many_args_musttail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i
 ; LA32-NEXT:    ori $a5, $zero, 5
 ; LA32-NEXT:    ori $a6, $zero, 6
 ; LA32-NEXT:    ori $a7, $zero, 7
-; LA32-NEXT:    st.w $a0, $sp, 0
+; LA32-NEXT:    st.w $a0, $sp, 4
 ; LA32-NEXT:    move $a0, $zero
 ; LA32-NEXT:    b many_args_callee
 ;
 ; LA64-LABEL: many_args_musttail:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a0, $zero, 9
-; LA64-NEXT:    st.d $a0, $sp, 8
 ; LA64-NEXT:    ori $a0, $zero, 8
+; LA64-NEXT:    st.d $a0, $sp, 0
+; LA64-NEXT:    ori $a0, $zero, 9
 ; LA64-NEXT:    ori $a1, $zero, 1
 ; LA64-NEXT:    ori $a2, $zero, 2
 ; LA64-NEXT:    ori $a3, $zero, 3
@@ -70,7 +70,7 @@ define i32 @many_args_musttail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i
 ; LA64-NEXT:    ori $a5, $zero, 5
 ; LA64-NEXT:    ori $a6, $zero, 6
 ; LA64-NEXT:    ori $a7, $zero, 7
-; LA64-NEXT:    st.d $a0, $sp, 0
+; LA64-NEXT:    st.d $a0, $sp, 8
 ; LA64-NEXT:    move $a0, $zero
 ; LA64-NEXT:    pcaddu18i $t8, %call36(many_args_callee)
 ; LA64-NEXT:    jr $t8
@@ -85,9 +85,9 @@ define i32 @many_args_musttail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i
 define i32 @more_args_tail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9) {
 ; LA32-LABEL: more_args_tail:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a0, $zero, 9
-; LA32-NEXT:    st.w $a0, $sp, 4
 ; LA32-NEXT:    ori $a0, $zero, 8
+; LA32-NEXT:    st.w $a0, $sp, 0
+; LA32-NEXT:    ori $a0, $zero, 9
 ; LA32-NEXT:    ori $a1, $zero, 1
 ; LA32-NEXT:    ori $a2, $zero, 2
 ; LA32-NEXT:    ori $a3, $zero, 3
@@ -95,15 +95,15 @@ define i32 @more_args_tail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %
 ; LA32-NEXT:    ori $a5, $zero, 5
 ; LA32-NEXT:    ori $a6, $zero, 6
 ; LA32-NEXT:    ori $a7, $zero, 7
-; LA32-NEXT:    st.w $a0, $sp, 0
+; LA32-NEXT:    st.w $a0, $sp, 4
 ; LA32-NEXT:    move $a0, $zero
 ; LA32-NEXT:    b many_args_callee
 ;
 ; LA64-LABEL: more_args_tail:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a0, $zero, 9
-; LA64-NEXT:    st.d $a0, $sp, 8
 ; LA64-NEXT:    ori $a0, $zero, 8
+; LA64-NEXT:    st.d $a0, $sp, 0
+; LA64-NEXT:    ori $a0, $zero, 9
 ; LA64-NEXT:    ori $a1, $zero, 1
 ; LA64-NEXT:    ori $a2, $zero, 2
 ; LA64-NEXT:    ori $a3, $zero, 3
@@ -111,7 +111,7 @@ define i32 @more_args_tail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %
 ; LA64-NEXT:    ori $a5, $zero, 5
 ; LA64-NEXT:    ori $a6, $zero, 6
 ; LA64-NEXT:    ori $a7, $zero, 7
-; LA64-NEXT:    st.d $a0, $sp, 0
+; LA64-NEXT:    st.d $a0, $sp, 8
 ; LA64-NEXT:    move $a0, $zero
 ; LA64-NEXT:    pcaddu18i $t8, %call36(many_args_callee)
 ; LA64-NEXT:    jr $t8
@@ -124,9 +124,9 @@ define i32 @more_args_tail(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %
 define i32 @different_args_tail_32bit(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4) nounwind {
 ; LA32-LABEL: different_args_tail_32bit:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a0, $zero, 9
-; LA32-NEXT:    st.w $a0, $sp, 4
 ; LA32-NEXT:    ori $a0, $zero, 8
+; LA32-NEXT:    st.w $a0, $sp, 0
+; LA32-NEXT:    ori $a0, $zero, 9
 ; LA32-NEXT:    ori $a1, $zero, 1
 ; LA32-NEXT:    ori $a2, $zero, 2
 ; LA32-NEXT:    ori $a3, $zero, 3
@@ -134,7 +134,7 @@ define i32 @different_args_tail_32bit(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4) no
 ; LA32-NEXT:    ori $a5, $zero, 5
 ; LA32-NEXT:    ori $a6, $zero, 6
 ; LA32-NEXT:    ori $a7, $zero, 7
-; LA32-NEXT:    st.w $a0, $sp, 0
+; LA32-NEXT:    st.w $a0, $sp, 4
 ; LA32-NEXT:    move $a0, $zero
 ; LA32-NEXT:    b many_args_callee
 ;
@@ -187,9 +187,9 @@ define i32 @different_args_tail_64bit(i128 %0, i128 %1, i128 %2, i128 %3, i128 %
 ;
 ; LA64-LABEL: different_args_tail_64bit:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a0, $zero, 9
-; LA64-NEXT:    st.d $a0, $sp, 8
 ; LA64-NEXT:    ori $a0, $zero, 8
+; LA64-NEXT:    st.d $a0, $sp, 0
+; LA64-NEXT:    ori $a0, $zero, 9
 ; LA64-NEXT:    ori $a1, $zero, 1
 ; LA64-NEXT:    ori $a2, $zero, 2
 ; LA64-NEXT:    ori $a3, $zero, 3
@@ -197,7 +197,7 @@ define i32 @different_args_tail_64bit(i128 %0, i128 %1, i128 %2, i128 %3, i128 %
 ; LA64-NEXT:    ori $a5, $zero, 5
 ; LA64-NEXT:    ori $a6, $zero, 6
 ; LA64-NEXT:    ori $a7, $zero, 7
-; LA64-NEXT:    st.d $a0, $sp, 0
+; LA64-NEXT:    st.d $a0, $sp, 8
 ; LA64-NEXT:    move $a0, $zero
 ; LA64-NEXT:    pcaddu18i $t8, %call36(many_args_callee)
 ; LA64-NEXT:    jr $t8